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HANBit
HMF1M32F2VSA
Flash-ROM Module 4MByte (1Mx32Bit), 80Pin-SMM, 3.3V Design Part No. HMF1M32F2VSA
GENERAL DESCRIPTION
The HMF1M32F2VSA is a high-speed flash read only memory (FROM) module containing 2,097,152 words organized in a x32bit configuration. The module consists of Two 1M x 16 FROM mounted on a 80-pin stackable type, double - sided, FR4printed circuit board. Commands are written to the command register using standard microprocessor write timings. Register contents serve as input to an internal state-machine, which controls the erase and programming circuitry. Write cycles also internally latch addresses and data needed for the programming and erase operations. Reading data out of the device is similar to reading from 12.0V flash or EPROM devices. Output enable (/OE) and write enable (/WE) can set the memory input and output. The host system can detect a program or erase operation is complete by observing the Ready Pin, or reading the DQ7(Data # Polling) and DQ6(Toggle) status bits. When FROM module is disable condition the module is becoming power standby mode, system designer can g et low-power design. All module components may be powered from a single + 3.0V DC power supply and all inputs and outputs are LVTTL-compatible.
FEATURES
P1 w Part Identification - HMF1M32F2VSA : Socket 5mm w Access time: 90, 100, 120ns w High-density 8MByte design w High-reliability, low-power design w Single + 3.0V 0.5V power supply w All in/outputs are LVTTL-compatible w FR4-PCB design w 80-pin Designed by 40-pin Fine Pitch Connector (x 2EA) w Minimum 1,000,000 write/erase cycle w Sector erases architecture PIN 1 2 3 4 5 6 7 8 9 10 11 12 Symbol VCC NC (CE0*) NC NC NC RY_BY* VSS RESET* WE* A10 A21 A20 A19 VSS A18 A17 A16 A15 A14 VCC PIN 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
PIN ASSIGNMENT
P2 Symbol VCC DQ16 DQ24 DQ17 DQ25 DQ18 VSS DQ26 DQ19 DQ27 DQ20 DQ28 DQ21 VSS DQ29 DQ22 DQ30 DQ23 DQ31 VCC PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Symbol VCC DQ15 DQ7 DQ14 DQ6 DQ13 VSS DQ5 DQ12 DQ4 DQ11 DQ3 DQ10 VSS DQ2 DQ9 DQ1 DQ8 DQ0 VCC PIN 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 Symbol VCC NC NC BYTE* OE* CE1* VSS A13 A29 A11 A12 A22 A23 VSS A24 A25 A26 A27 A28 VCC
OPTIONS
w Timing
90ns access 100ns access 120ns access w Packages 80-pin SMM
MARKING
-90 -100 -120
13 14 15 16 17 18
F
19 20
4 cf : Address & Data Bus is organized for LG Specification. ( A10 & DQ0 are MSB, A29 & DQ31 are LSB)
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FUNCTIONAL BLOCK DIAGRAM
HMF1M32F2VSA
32 DQ31- DQ0 20 A29 - A10 A0-19 DQ 0-15 /WE /OE /CE RY-BY /Reset
U1
A0-19 DQ 16-31 /WE /OE /CE1 /RY_BY /RESET /WE /OE /CE RY-BY /Reset
U2
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TRUTH TABLE
MODE STANDBY NOT SELECTED READ WRITE or ERASE NOTE: X means don't care /OE X H L X /CE H L L L /WE X H H L /RESET Vcc0.3V H H H
HMF1M32F2VSA
DQ ( /BYTE=L ) HIGH-Z HIGH-Z DOUT DIN
POWER STANDBY ACTIVE ACTIVE ACTIVE
ABSOLUTE MAXIMUM RATINGS
PARAMETER Voltage with respect to ground all other pins Voltage with respect to ground Vcc Storage Temperature SYMBOL VIN,OUT VCC TSTG RATING -0.5V to Vcc+0.5V -0.5V to +4.0V -65oC to +150oC
Operating Temperature TA -40oC to +85oC w Stresses greater than those listed under " Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operating section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
RECOMMENDED DC OPERATING CONDITIONS
PARAMETER Vcc for 10% device Supply Voltages Ground SYMBOL Vcc VSS MIN 2.7V 0 TYP. 3.0 0 MAX 3.6V 0
DC AND OPERATING CHARACTERISTICS ( 0oC TA 70 oC )
PARAMETER Input Leakage Current Output Leakage Current Output High Voltage Output Low Voltage Vcc Active Read Current (1) /OE = VIH, Vcc Active Write Current (2) Vcc Standby Current Low Vcc Lock-Out Voltage Notes: /CE = V IL, /OE=VIH /CE, /RESET=Vcc0.3V 1MHZ ICC2 ICC3 VLKO TEST CONDITIONS Vcc=Vcc max, VIN= GND to Vcc Vcc=Vcc max, VOUT= GND to Vcc IOH = -2.0mA, Vcc = Vcc min IOL = 4.0mA, Vcc =Vcc min /CE = VIL, 5MHZ ICC1 1.5 16 60 60 mA mA V SYMBOL IL1 IL0 VOH VOL MIN -10 -10 0.85x Vcc MAX 1.0 1.0 0.4 32 mA UNIT A A V V
1. The Icc current listed includes both the DC operating current and the frequent component (at 5MHz). 2. Icc active while embedded algorithm (program or erase) is in progress 3. Not 100% tested
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ERASE AND PROGRAMMING PERFORMANCE
LIMITS PARAMETER MIN. Block Erase Time Chip Erase Time Word Programming Time Chip Programming Time TYP. 0.7 27 11 12 330 36 MAX. 15 sec sec s sec UNIT
HMF1M32F2VSA
COMMENTS
Excludes 00H programming prior to erasure Excludes system-level overhead
TSOP CAPACITANCE
PARAMETER SYMBOL CIN COUT CIN2 PARAMETER DESCRIPTION Input Capacitance Output Capacitance Control Pin Capacitance TEST SETUP VIN = 0 VOUT = 0 VIN = 0 MIN MAX 10 10 10 UNIT pF pF pF
Notes : Capacitance is periodically sampled and not 100% tested.
TEST SPECIFICATIONS
TEST CONDITION Output load Input rise and full times Input pulse levels Input timing measurement reference levels Output timing measurement reference levels VALUE 1TTL gate 5 0 to 3 1.5 1.5 ns V V V UNIT
5.0V 2.7k Device Under Test CL IN3064 or Equivalent
6.2k
Diodes = IN3064 or Equivalent
Note : CL = 100pF including jig capacitance
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AC CHARACTERISTICS u Read Only Operations Characteristics
SPEED PARAMETER DESCRIPTION MIN tRC tACC tCE tOE tDF tOEH tQH Read Cycle Time Address Access time Chip Enable to Access time Output Enable time Chip Enable to Output High -Z Output Enable Hold Time Output Hold Time From Addresses, /CE or /OE 0 0 90 90 90 35 30 0 0 - 90 MAX MIN 100 100 100 40 30 -100 MAX
HMF1M32F2VSA
-120 MIN 120 120 120 50 30 0 0 MAX
UNIT
ns ns ns ns ns ns ns
u Erase/Program Operations Alternate /WE Controlled Writes
- 90 PARAMETER tWC tAS tAH tDS tDH tOES tGHWL tCS tCH tWP tWPH tPGM tBERS tVCS tRB tRH tRPD tRP tRSTS DESCRIPTION Write Cycle Time (1) Address Setup Time Address Hold Time Data Setup Time Data Hold Time Output Enable Setup Time Read Recover Time Before Write /CE Setup Time /CE Hold Time Write Pulse Width Write Pulse Width High Programming Operation Block Erase Operation (2) Vcc set up time Write Recover Time Before RY_/BY /RESRT High Before Read /RESRT to Power Down Time /RESRT Pulse Width /RESRT Setup Time 0.7 50 0 50 20 500 500 MIN 90 0 45 45 0 0 0 0 0 45 30 11 0.7 50 0 50 20 500 500 MAX MIN 100 0 45 45 0 0 0 0 0 45 30 11 0.7 50 0 50 20 500 500 -100 MAX MIN 120 0 50 50 0 0 0 0 0 50 30 11 -120 MAX ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns
Notes : : 1. Not 100% tested 2 . The duration of the program or erase operation varies and is calculated in the internal algorithms.
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u Erase/Program Operations Alternate /CE Controlled Writes
- 90 PARAMETER tWC tAS tAH tDS tDH tOES tGHWL tCS tCH tWP tWPH tPGM tBERS DESCRIPTION MIN Write Cycle Time(1) Address Setup Time Address Hold Time Data Setup Time Data Hold Time Output Enable Setup Time Read Recover Time Before Write /CE Setup Time /CE Hold Time Write Pulse Width Write Pulse Width High Programming Operation Block Erase Operation (2) 0.7 90 0 45 45 0 0 0 0 0 45 30 11 0.7 MAX MIN 100 0 45 45 0 0 0 0 0 45 30 11 MAX -100
HMF1M32F2VSA
-120 MIN 120 0 50 50 0 0 0 0 0 50 30 11 0.7 MAX ns ns ns ns ns ns ns ns ns ns ns ns ns
Notes : 1. Not 100% tested 2 . This does not include the preprogramming time
u READ OPERATIONS TIMING
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u RESET TIMING
HMF1M32F2VSA
u PROGRAM
OPERATIONS TIMING
Alternate /WE Controlled Writes
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uALTERNATE /CE CONTROLLED WRITES
HMF1M32F2VSA
u CHIP/BLOCK ERASE OPERATION TIMINGS
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HMF1M32F2VSA
u DATA# POLLING TIMES DURING INTERNAL ROUTINE OPERATION
u RY_ /BY TIMEING DURING ERASE / PROGRAM OPERATION
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u TOGGLE# BIT DURING INTERNAL ROUTINE OPERATION
HMF1M32F2VSA
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PACKAGE DIMENSIONS
HMF1M32F2VSA
1.30.10 mm
ORDERING INFORMATION
Component Number 2EA 2EA 2EA
Part Number
Density
Org.
Package
Vcc
SPEED
HMF1M32F2VSA-90 HMF1M32F2VSA-100 HMF1M32F2VSA-120
4MByte 4Mbyte 4Mbyte
x 32
80Pin - SMM 80Pin - SMM 80Pin - SMM
3.3V 3.3V 3.3V
90ns 100ns 120ns
x 32 x 32
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